Current phase lock loop (PLL) based frequency synthesizers are feedback systems that may be used to create a signal with programmable frequency from a reference frequency. Such a frequency synthesizer may comprise a phase detector and charge-pump for producing an error signal that signifies the proportion of any phase difference between an output signal and an input reference frequency. In addition, current frequency synthesizers may also include features for feeding the error signal into a low-pass filter and then into a voltage-controlled oscillator (VCO) such that the output signal that is produced is synchronized with the input reference frequency to the frequency synthesizer. Current frequency synthesizers may employ the negative feedback loop method of feeding the output from the VCO back into the input of the phase frequency detector such that an error signal may be generated, coupling the output signal from the VCO to the input reference frequency. In some current frequency synthesizers, the output signal may be fed into a frequency divider circuit to produce an integer multiple of the input reference frequency.
Current frequency synthesizers can only generate a frequency at an integer multiple of the input reference frequency. To circumvent such restriction, the frequency synthesizer may further include a modulator to modulate the value of the division per frequency cycle to obtain a fractional value. Such a frequency synthesizer is called a fractional-N frequency synthesizer. The fractional-N frequency synthesizer can generate signals whose frequency is of the form:
            F      vco        =                  F        reference            ×              (                  INT          +                      FRAC            MOD                          )              ,where INT, FRAC, and MOD are integers, and Fveo is thus not necessarily an integer multiple of the reference frequency Freference. Existing modulation may continuously create time differences at the input of the phase frequency detector, which in turn are converted into charge quantities by the charge-pump. Consequently, when switching the charge-pump current, a discontinuity in the time difference to charge quantity conversion factor can generate a phase disturbance and a loss of phase-lock. Some methods may rely on controlling the exact state of the modulator at a switching time to minimize the phase discontinuities. However, such methods can not compensate for the phase discontinuity without any constraint on the state of the modulator. In addition, such methods must include a look-up table with initialization values for the modulator on a per-channel basis.